Описание вакансии
Location: Palo Alto, United States
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Location:
Palo Alto, CA
📄
Employment Type:
Contract
🏢
Work Arrangement:
On-site
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Start Date:
TBD
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Compensation:
TBD — based on skills and experience
Important Screening Requirements
5+ years of experience
in post-silicon characterization, high-speed I/O (HSIO) validation, or memory electrical validation.
Hands-on experience characterizing
high-speed SerDes PHYs
, particularly PCIe.
Experience measuring
eye diagrams, jitter, bit error rate (BER), and S-parameters
.
Proficiency with high-speed oscilloscopes, bit error rate testers (BERT), and VNA/TDR equipment.
Ability to read and interpret schematics and PCB layouts.
Experience debugging electrical issues directly at the probe point.
Python scripting experience for laboratory test automation.
Background in semiconductor, silicon, or systems companies, including SoC, GPU, networking, storage, or automotive compute.
Must be willing to work
on-site in Palo Alto, CA
.
About the Role
We are seeking a hands-on
PCIe Characterization Engineer
to perform post-silicon electrical characterization and validation of high-speed SerDes physical-layer interfaces in a laboratory environment.
The role focuses on conducting high-speed electrical measurements, analyzing signal integrity, and validating silicon performance. You will independently operate laboratory equipment, troubleshoot signal-level issues, interpret hardware schematics and PCB layouts, and automate characterization workflows using Python.
The successful candidate will have direct experience with high-speed interface characterization and the practical skills needed to investigate electrical performance issues at the measurement and probe points.
What We’re Looking For
We’re looking for an experienced
post-silicon characterization or HSIO validation engineer
with strong hands-on laboratory skills and practical knowledge of high-speed electrical measurements.
The ideal candidate can independently perform eye, jitter, BER, and S-parameter measurements; operate high-speed test equipment; interpret schematics and layouts; and troubleshoot signal integrity issues directly in the lab.
Strong candidates will combine experience with
PCIe and SerDes interfaces, high-speed measurement instrumentation, electrical debugging, and Python-based lab automation
.
Key Responsibilities
Post-Silicon Characterization & Validation
Perform post-silicon electrical characterization of high-speed SerDes PHYs, including:
PCIe
Ethernet
UFS
LPDDR5
Support high-speed interface validation and investigate electrical performance issues.
Analyze characterization results to assess high-speed interface performance.
Identify and troubleshoot signal-level issues during testing.
High-Speed Electrical Measurements
Conduct
eye diagram, jitter, bit error rate (BER), and S-parameter measurements
.
Independently operate laboratory measurement equipment, including:
High-speed oscilloscopes
Bit error rate testers (BERT)
Vector network analyzers (VNA)
Time-domain reflectometry (TDR) equipment
Analyze measurement data to evaluate electrical performance and signal integrity.
Document test configurations, measurement results, and characterization findings.
Schematic Analysis & Electrical Debugging
Read and interpret electrical schematics and PCB layouts to support characterization activities.
Troubleshoot signal integrity and electrical issues directly at probe points.
Investigate measurement anomalies and high-speed interface performance problems.
Apply practical electrical measurement and debugging techniques to identify potential issues.
Python Lab Automation
Develop and maintain
Python scripts
to automate laboratory measurements and characterization workflows.
Support repeatable and efficient execution of electrical tests.
Improve laboratory testing efficiency through reusable automation scripts.
Assist with measurement data collection, analysis, and documentation.
Cross-Functional Validation Support
Support high-speed interface validation activities across relevant silicon and systems platforms.
Collaborate with engineering teams to investigate electrical performance issues.
Communicate measurement findings, debugging results, and characterization progress.
Maintain clear technical documentation of test procedures, configurations, and results.
Required Qualifications
5+ years of experience
in post-silicon characterization, HSIO validation, or memory electrical validation.
Experience working at a semiconductor, silicon, or systems company in areas such as SoC, GPU, networking, storage, or automotive compute.
Hands-on experience with high-speed SerDes PHY characterization.
Practical experience measuring eye diagrams, jitter, BER, and S-parameters.
Proficiency using high-speed oscilloscopes, BERT, and VNA/TDR equipment.
Experience reading and interpreting schematics and PCB layouts.
Strong laboratory debugging and electrical measurement skills.
Python scripting experience for test and measurement automation.
Strong analytical, troubleshooting, and problem-solving abilities.
Willingness to work on-site in Palo Alto, CA.
Preferred Qualifications
Experience with
PCIe electrical characterization and validation
.
Exposure to Ethernet, UFS, or LPDDR5 interfaces.
Experience with high-speed signal integrity measurements and analysis.
Background in silicon validation for SoC, GPU, networking, storage, or automotive-compute products.
Experience developing reusable automation scripts and improving laboratory test efficiency.
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